Join us on November 14th as we demonstrate a highly efficient, accurate, chip-centric, system-aware thermal simulation workflow for multi-die packages using Ansys RedHawk SC ET and Icepak. We'll show a comprehensive electro-optical simulation workflow with Ansys HFSS, AEDT, and Lumerical INTERCONNECT to capture packaging effects on the signal integrity of systems within a multi-die package.
Venue:
Virtual
Co-packaged optics (CPO) is a promising candidate for implementing low-power, low-latency, and high-bandwidth optical links in data centers and high-speed, on-chip interconnects in high-performance computing (HPC) systems. By bringing the optical transceiver into the 3DIC package, CPO can reduce the transceiver system's complexity, power loss, and latency. However, these significant advantages offered by CPO come at the cost of increased complexity in designing them.
Packing the electrical and photonic dies in a multi-die stack significantly increases the overall power density since the optical transceiver, under normal operating conditions, can contribute a lot of thermal power to the package. Accurate thermal simulation of the 3DIC package and the surrounding system is needed to ensure the system's thermal integrity.
From a signal integrity point of view, numerous packaging interconnects, such as BGAs, TSVs, etc., are introduced during the packaging to transmit the RF signal between the different dies. Designers need to first design these packaging interconnects for optimum performance and then account for their effects on the overall signal integrity of the electro-optical system via circuit/system-level simulations.
This webinar will first demonstrate a highly efficient and accurate chip-centric, system-aware thermal simulation workflow for multi-die packages using Ansys RedHawk SC ET and Icepak. We will then show a comprehensive electro-optical simulation workflow with Ansys HFSS, AEDT, and Lumerical INTERCONNECT to capture packaging effects on the signal integrity of systems within a multi-die package.
