In this latest installment of the year-long 3D-IC webinar series, Dr. Lang Lin will discuss the Thermal Integrity issues associated with 3D-IC designs. The presentation will cover thermal hotspots, mechanical stresses induced by thermal issues, and methods for capturing these problems with simulation and virtual prototyping, with a focus on designs that utilize silicon interposers.
Venue:
Virtual
Thermal integrity and thermal-induced mechanical issues are becoming essential for the new generation of 2.5D/3D-IC with closely packed chiplets on an interposer, package, and board due to strong cross-die thermal coupling. Traditionally, on-chip thermal sensors are placed on potential hotspots to detect real-time temperature to avoid thermal throttling via the Dynamic Thermal Management (DTM) technique. However, it is challenging to cover all hotspot locations of a complicated stacked-die system to place the sensors. This presentation will introduce the key technologies from Ansys to address pre-silicon thermal integrity simulation and mechanical stress analysis.
All 3D-IC designers
