Ansys To Showcase Advances in 3D-IC and Automotive Electronics at DAC 2023

The 2023 Design Automation Conference and Exhibit is just around the corner from July 9 – 13 in San Francisco, and Ansys will be attending in full force. We are honored to have Chief Technology Officer Prith Banerjee deliver a Visionary Speaker address at the opening of the conference on Tuesday morning. Prith will share his insights on “Driving Engineering Simulation and Design with AI/ML,” where he will discuss how Ansys is incorporating artificial intelligence and machine learning (AI/ML) capabilities into its products.

With one of the larger booths in the entire exhibit (#1539), we will focus on our multiphysics technologies for 2.5D/3D-IC signoff of thermal, electromagnetic, and mechanical reliability (stress/warpage). The technology for multi-die, heterogeneous integration has been advancing by leaps and bounds as the semiconductor industry moves to this new design paradigm. Presentations on this and other topics are scheduled every hour in the Ansys DAC Booth Theater for any DAC attendee to sit in and ask questions. Two information stations will be available for self-guided browsing through the full range of Ansys technology offerings or to engage with any of the Ansys support specialists standing by. Ansys is also sponsoring the Community Connection Zone (#1551) right next door to the Ansys booth where people can sit down, take a break, and relax with a coffee or a bite to eat.

Another focal point at this year’s booth centers on automotive electronics. The automotive sector is undergoing tectonic changes as manufacturers rush to adapt to three fundamental drivers of innovation: electrification of the power train, autonomous driving, and the over-the-air connected vehicle. Each of these forces are increasing the electronic and semiconductor content in future vehicles. This aligns with Ansys’ deep and broad set of automotive solutions — from high-performance computing (HPC) chips for AI/ML algorithms, to battery management, mechanical reliability, crash test simulation, lighting, and more.

The automotive theme continues at the annual Ansys DAC Breakfast Panel. This event serves a full breakfast to attendees who register for the panel discussion. It will be held in the Marriott Marquis on Tuesday, July 11 from 7 – 8:30 a.m. (room Golden Gate B). The topic of this year’s panel discussion is “Driving Design Excellence: The Future of Automotive Electronics.” The discussion will be moderated by Ansys Senior Chief Technologist for Automotive Judy Curran, who has over 30 years of experience in the automotive industry. A final roster of panelists will be announced soon. Attendees must register for the Breakfast Event at the Ansys DAC webpage.

The widespread use of Ansys products across the semiconductor industry has enabled Ansys customers to submit over 22 technical papers that have been accepted by the DAC Conference and will be presented in the Engineering Track. On Monday afternoon, Ansys product specialist Lang Lin will be joined by researchers from the University of Kobe and the University of Maryland to deliver a tutorial on “Side-Channel Analysis: from Concepts to Simulation and Silicon Validation.”

With so many expert users from Ansys customers attending DAC, Ansys is organizing a series of customer workshops in one of the conference rooms at the Ansys Booth. The workshops are two-hour sessions organized into several tracks. Ansys customers will present detailed technical summaries of their experiences and successes in applying Ansys technology to their production designs. The seating for these valuable workshops is extremely limited, so reserve your seat as early as possible.

Finally, Ansys is fully engaged with the many discussions and panels that make DAC the valuable must-go event of the year:

• John Lee, Ansys VP & GM of Electronics, Semiconductor, and Optics is joining the panel discussion on “Best of Both Worlds: Bridging the Gap Between EDA, System, and Manufacturing”
• Prith Banerjee, Ansys CTO is participating in “Designing Effective Autonomous Systems and Digital Twins”
• Larry Williams, Ansys Distinguished Engineer will be contributing to “Is Systems Engineering the Solution to the Limits of Dennard Scaling and Moore's Law?”
• Murat Becer, Ansys VP of R&D will join the “Are We There Yet? From Cloud-compatible to Cloud-optimized” panel
• Norman Chang, Ansys Fellow, will be joining the panel on “Packaging and Manufacturing Technologies Save the Day!”