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Ansys & Synopsys

Accelerating Multiphysics Design Success at the Interaction of Chips and Systems

Power, Thermal, and Reliability Signoff for Advanced SoCs, 2.5D, and 3DIC

At the end of the design cycle, design challenges that emerge at 7nm and below with 2.5D/3D systems can't be an afterthought. A range of novel physical effects, from thermal analysis to electromagnetic interference and advanced 3D layout capabilities, needs to inform the design right from the prototyping stage. Ansys and Synopsys entered into a strategic alliance that delivers the industry's best EDA solution for these new challenges. Ansys' RedHawk-SC™ family of power integrity, thermal, and reliability signoff products integrated with Synopsys' best-in-class Fusion Compiler™ platform, 3DIC Compiler™ platform, and PrimeTime® signoff platform provides customers golden signoff accuracy for chip, package, and system-level effects within the Synopsys design environment. This enables rapid design exploration, early weakness detection, in-design analysis, voltage-timing optimization, thermal-aware reliability, and final signoff from within the place-and-route environment.

Power, Thermal, and Reliability Signoff  for Advanced SoCs, 2.5D, and 3DIC

Key Benefits 

  • Unified Co-design & Analysis
    Optimize PPA with the Industry’s only 2.5/3DIC solution

  • Superior PPA with IR-drop Aware Timing & ECO
    Reduce peak and average power and improve design robustness

  • Multiphysics-Aware Chip Design
    Architect chip and 3D packages for the full range of interdependent physics
Synopsys Key Benefits

Address Your 3D Multi-Die, Multi-Node Implementation with Greater Confidence

Ansys RedHawk-SC Electrothermal solves the electrical and thermal coupling interactions of 2.5D/3DIC structures in full detail for up to a billion instances, concurrently. Synopsys’ 3DIC Compiler platform provides a complete, end-to-end heterogeneous implementation for efficient 2.5/3D multi-die design and full- system integration. The result is a robust, integrated design development that accelerates 3D system-level convergence and optimizes power, performance, and area (PPA/mm3) for heterogeneous design and 3D integration. Customers can address their 3D multi-die, multi-node implementation with greater confidence and bring products to market more quickly.

Synopsys Areas of Collaboration

Accelerate Design Closure of Advanced Node Designs 

The Ansys and Synopsys partnership delivers an unparalleled range of multiphysics signoff capabilities that extend from the transistor level all the way up to full system analysis. Synopsys implementation platforms work with Ansys system-level simulators to optimize today’s high-speed and power-dense electronics. This enables high-fidelity simulation and signoff of thermal, signal integrity (SI), reliability, and electromagnetic interference in a realistic context. System interactions are shifted left and anticipated in early prototyping to improve final system performance and avoid late-stage system integration surprises.

Accelerate Design Closure of Advanced Node Design

Design From Chip to System Level

The Ansys and Synopsys partnership delivers an unparalleled range of multiphysics signoff capabilities that extend from the transistor level all the way up to full system analysis. Synopsys implementation platforms work with Ansys system-level simulators to optimize today’s high-speed and power-dense electronics. This enables high-fidelity simulation and signoff of thermal, signal integrity (SI), reliability, and electromagnetic interference in a realistic context. System interactions are shifted left and anticipated in early prototyping to improve final system performance and avoid late-stage system integration surprises.

Design from chip to systemlevel

Latest News

Synopsys press release

Synopsys Press Release

Synopsys Press Release 3DIC Compiler, Industry's First Unified Platform To Accelerate Multi-Die System Design

RedHawk-SC Electrothermal

RedHawk-SC Electrothermal

RedHawk-SC Electrothermal is integrated with Synopsys 3DIC Compiler for comprehensive thermal, mechanical, and power integrity analysis of multi-die packages and chiplet systems.

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