Best Practices for Semiconductor Safety Analysis
This webinar will offer actionable insight into the latest strategies and techniques for designing and validating safety-critical semiconductors that meet and exceed industry requirements.
DATE / TIME:
February 26, 2025
11 AM EST (17:00 Europe)
Venue:
Virtual
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Overview
In the evolving world of automotive technology, safety remains paramount, especially as safety-critical systems like advanced driver assistance systems (ADAS), electric powertrains, and vehicle communication networks push the capability of semiconductor potential.
Ensuring compliance with strict safety standards, such as ISO26262, remains critical, but the electronics and system-on-chip (SoC) design are becoming increasingly complex, requiring a tool-based approach. This webinar will offer actionable insight into the latest strategies and techniques for designing and validating safety-critical semiconductors that meet and exceed industry requirements.
What attendees will learn
- Why model-based safety is critical for meeting automotive safety standards
- How Ansys medini Analyze can be used for safety-critical design and analysis for semiconductors
- Focus on tools like fault tree analysis (FTA) and failure mode effects and diagnostics analysis (FMEDA)
- Connecting safety analysis to the design hierarchy of the chip
- Example workflows to enhance semiconductor safety analysis
Who should attend
- Safety managers/engineers
- System engineer
- Semiconductor designer
Speakers
- Eckhardt Holz (Director R&D)
- Michael Soden (Senior Product Manager)