Quick Specs
Lumerical CML Compiler offers an efficient way to build high-quality INTERCONNECT and photonic Verilog-A compact models from a single source of measurement and/or simulation data.
Automatically build compact model libraries (CMLs) with a proven, automated, cross-platform model generator using the Ansys Lumerical CML Compiler.
Build and Maintain CMLs with Confidence
Efficiently create compact model libraries (CMLs) with the proven reliability of Lumerical CML Compiler. The software automates the creation, calibration, maintenance, and QA testing of INTERCONNECT and photonic Verilog-A compact model libraries from a single data source. The source data can come from experimental measurement, 2D/3D physical simulation, or a combination thereof.
Lumerical CML Compiler offers an efficient way to build high-quality INTERCONNECT and photonic Verilog-A compact models from a single source of measurement and/or simulation data.
JANUARY 2025
Ansys 2025 R1 expands photonic design capabilities with custom Verilog-A model creation for unique elements and fiber array for precise chip-to-fiber coupling loss modeling with Monte Carlo yield analysis.
This model allows CML Compiler users to create a photonic Verilog-A model for any unique, active, or passive, custom element currently not supported by CML Compiler. Users can write their own Verilog-A code to define the input-output relationship for the element.
The new fiber array enables users to model the excess loss from chip-to- fiber coupling and supports an arbitrary number of Pcell parameters and fibers in the array. Additionally, the statistically enabled model supports Monte Carlo sweeps for yield analysis, taking into account the correlation between the statistical parameters.
CAPABILITIES
CML Compiler automates the creation, maintenance, and QA testing of INTERCONNECT and Verilog-A photonic compact model libraries (CMLs) from a single data source of measurements and simulation results.
CML Compiler simplifies building accurate photonic compact models for your photonic PDK, enabling photonic integrated circuit design.
It's vital to Ansys that all users, including those with disabilities, can access our products. As such, we endeavor to follow accessibility requirements based on the US Access Board (Section 508), Web Content Accessibility Guidelines (WCAG), and the current format of the Voluntary Product Accessibility Template (VPAT).