Ansys stellt Studierenden auf dem Weg zum Erfolg die Simulationssoftware kostenlos zur Verfügung.
Ansys stellt Studierenden auf dem Weg zum Erfolg die Simulationssoftware kostenlos zur Verfügung.
Ansys stellt Studierenden auf dem Weg zum Erfolg die Simulationssoftware kostenlos zur Verfügung.
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UMC and Ansys deliver a comprehensive suite of design solutions for UMC’s latest FinFET technology
PITTSBURGH, June 25, 2018 – Ansys announced the certification of Ansys® RedHawk™ and Ansys® Totem™ for UMC's advanced 14nm FinFET process technology. Through the certifications and a comprehensive suite of semiconductor design solutions, Ansys and UMC support mutual customers to meet increasing demands for next-generation mobile and high-performance computing (HPC) applications.
UMC's certification with Ansys includes extraction, power integrity and reliability, signal electromigration (signal EM) and self-heat analysis. Ideal for applications that require increased functionality, high performance and low power, UMC’s 14nm FinFET technology performance is 55 percent faster and consumes 50 percent less power than 28nm process technology.
“UMC is constantly improving its design support portfolio to help customers reduce their design time and accelerate time to market.,” said T.H. Lin, director of intellectual property development and design support division at UMC. “Through the collaboration with Ansys, joint customers can leverage the power of Ansys’ multiphysics simulations to optimize their designs to enhance performance and reduce overdesign.”
“The growing interdependency of various multiphysics effects, such as power, reliability and thermal issues, in sub 16nm designs poses significant challenges for design closure,” said John Lee, general manager at Ansys. “Ansys’ semiconductor solutions are architected for multiphysics optimization and UMC’s certifications enable mutual customers to accelerate design convergence with Ansys solutions that have been verified through rigorous testing and accuracy benchmarks.”
Ansys will be featured at the Design Automation Conference (DAC) in booth 1637 from June 24-28 in San Francisco, California.