Course Overview
This workshop will teach you how to perform signal and power integrity analysis of silicon interposers using Ansys RaptorX in standalone mode. You will learn how to assign ports on signal, power, and ground nets for S-parameter extraction, including how to efficiently include deep trench capacitors in the extracted model. This will enable you to perform any electromagnetic extraction required for modelling silicon interposers. The workshop will include a live session where ports are placed and a small section of a silicon interposer signal, power, and ground nets will be extracted.
Prerequisites
It is highly recommended you understand the following:
- IC design
- Different die packaging
- UNIX and Linux
- S-parameters
- RaptorX (Recommended but not essential)
Teaching Method
Self-paced slide presentation and computer practical sessions to validate acquired knowledge. Emphasis is placed on tool background & methodology as well as workshops.
