Ansys is committed to setting today's students up for success, by providing free simulation engineering software to students.
Ansys is committed to setting today's students up for success, by providing free simulation engineering software to students.
Ansys is committed to setting today's students up for success, by providing free simulation engineering software to students.
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The semiconductor industry continues to evolve rapidly, with increasing demands for faster, more efficient, and power-optimized designs. At Ansys, we understand the challenges chip designers face in reducing time to market while controlling costs and improving performance. With the launch of 2025 R1, we’re excited to unveil groundbreaking advancements across our semiconductor product portfolio, delivering unprecedented speed, accuracy, and usability.
2025 R1 introduces significant speedups and performance optimizations, ensuring that you can tackle the most complex chip designs with confidence:
Ansys PowerArtist software introduces a powerful methodology to analyze and fix glitch power, a growing concern for low-power and energy-efficient designs. This enhancement empowers designers to identify and address power anomalies with precision, improving the efficiency of next-generation chips.
After beta testing, PowerX software is now available to all design engineers and semiconductor companies for production use. This is a parasitic debugging tool that shaves off hours or even days of design time by quickly identifying parasitic issues in semiconductor power devices.
In 2025 R1, all chiplet and interposer power data can now be consolidated into a single model more efficiently, enabling faster power integrity analysis of 3D-ICs with reduced memory usage. The accelerated simulation times also facilitate quick calculations of system-level effective resistance. Additionally, advanced software enhancements are available for thermal analysis of 3D-ICs with photonic circuits, highlighting our expertise in comprehensive system-level analysis.
ParagonX software is an IC layout parasitic analysis and debugging tool for signal interconnect. The latest enhancements enable it to identify parasitic-related design issues much faster through parallel processing. Additionally, the RaptorX solver now delivers three times faster sign-off for larger analog and mixed-signal designs, thanks to significant performance improvements.
Ansys Semiconductors has strengthened its collaboration with TSMC by developing a novel flow with Ansys RedHawk-SC Electrothermal software to assess thermal-induced stresses in 3D-ICs during the manufacturing stage.
We have partnered with eShard, a leading expert in hardware security, to enhance the security of chips from side-channel attacks. This delivers a comprehensive solution that includes both pre-silicon and post-silicon security verification. eShard can deploy proven algorithms for verifying many advanced security algorithms, including AES, RSA, ECC, and HMAC. By collaborating with Ansys, this enables Ansys RedHawk-SC Security software to perform the same extensive suite of cryptographic analyses at the presilicon design stage and flag potential areas of weakness. This partnership will help ensure that there will be no data breach due to physical side-channel leakage.
The new release reflects our commitment to empowering engineers with tools that push the boundaries of innovation. Whether you're designing for AI, the Internet of Things (IoT), automotive, telecommunications, or any other domain, Ansys Semiconductors solutions are here to help you deliver groundbreaking products faster and more efficiently.
Learn more about what’s new in 2025 R1.
The Ansys Advantage blog, featuring contributions from Ansys and other technology experts, keeps you updated on how Ansys simulation is powering innovation that drives human advancement.