EDA Design Flow Integration
ANSYS SIwave with ANSYS ALinks for EDA seamlessly integrates into existing EDA design flows by importing design geometry directly from layout tools. The resulting SYZ networks or Full-Wave SPICE models generated by SIwave can be used in circuit simulation tools, such as ANSYS DesignerSI, ANSYS Simplorer, Synopsys HSPICE or other SPICE-compatible tools.
| Cadence |
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| Allegro |
16.0, 16.1, 16.2, 16.3 and 16.5 |
| APD |
16.0, 16.1, 16.2, 16.3 and 16.5 |
| SiP Digital/RF |
16.0, 16.1, 16.2, 16.3 and 16.5 |
| Virtuoso |
5.10, 6.14 & 6.15 (Linux only) |
| |
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| Mentor Graphics |
|
| Expedition |
v2005, v2007.1 through EE7.9 |
| Boardstation |
8.x (uses HKP design flow) |
| Boardstation XE |
v2007, v2007.1, v2007.2, v2007.3 and v2007.7 (uses HKP design flow) |
| PADS |
PowerPCB v5.2a, v2005 and v2007 |
| |
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| Zuken |
|
| CR5000 |
9.x and lower |
| CR5000 |
10 and higher (Zuken translator for .anf & .cmp) |
| |
|
| ODB++ |
|
| Altium Designer |
R10 |
| Mentor Expedition |
EE7.9.1 and greater |
| Zuken Cadstar |
12.1 (limited support) |
| Sigrity UPD |
V 11.1.1 (limited support) |
 Geometry from popular layout tools can be imported directly to ANSYS SIwave with ANSYS ALinks for EDA.
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